For this, I use the manual ” DDI0406C_b_arm_architecture_reference_manual.pdf” can be downloaded here (after registering on the mobile website):
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.set .architecture/index.html
In this manual, in the A8.8 section with instruction details, I cannot understand why an instruction (such as A1, A2,…) has multiple encodings, these The encoding seems to be implemented with ARMv7.
In addition, because ARM cortex A9 uses thumb-2, does it also implement A1/A2/…encoding, or only implement T1/T2…?
I really read that all parts of this manual are related to encoding, but I still don’t understand how we know the encoding used by the program.
An example of using different codes is A8.9.12 ADR< /p>
This instruction adds an immediate value to the PC value to form a PC-relative address, and writes the result to the
destination register. < /p>If the instruction is encoded as A1, the offset must be interpreted as zero or positive, if it is encoded as A2, the offset is negative.
Another example Yes A8.8.132 POP
If the list contains more than one register, the instruction is assembled to encoding A1. If the list contains exactly one register, the instruction is assembled to encoding A2.
I can imagine that for performance reasons, different POP encodings may be created to create different microcodes.
For the problem In the second part, Cortex-A9 is an ARMv7-A architecture CPU, which supports all the instructions specified in the manual you pointed out. Maybe you should read Cortex™-A9 Technical Reference Manual.
I am currently trying to implement a disassembler for ARM cortex A9, which implements the ARMv7 instruction set.
For this, I use Manual “DDI0406C_b_ar m_architecture_reference_manual.pdf” can be downloaded here (after registering on the mobile website):
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.set .architecture/index.html
In this manual, in the A8.8 section with instruction details, I cannot understand why an instruction (such as A1, A2,…) has multiple encodings, these The encoding seems to be implemented with ARMv7.
In addition, because ARM cortex A9 uses thumb-2, does it also implement A1/A2/…encoding, or only implement T1/T2…?
I really read that all parts of this manual are related to encoding, but I still don’t understand how we know the encoding used by the program.
Different codes of instructions do different things functionally.
An example of using different codes is A8.9.12 ADR
This instruction adds an immediate value to the PC value to form a PC-relative address, and writes the result to the
destination register.If the instruction If it is coded as A1, the offset must be interpreted as zero or positive. If it is coded as A2, the offset is negative.
Another example is A8.8.132 POP
If the list contains more than one register, the instruction is assembled to encoding A1. If the list contains exactly one register, the instruction is assembled to encoding A2.
I can imagine that for performance reasons, different POP encodings may be created to create different microcodes.
For the second part of the question, Cortex-A9 is an ARMv7- A architecture CPU, it supports all the instructions specified in the manual you pointed out. Maybe you should read Cortex™-A9 Technical Reference Manual.