Function stack

Physical memory distribution

Before introducing the function stack, first introduce the memory distribution of the SylixOS Lite version of the ARM platform. According to the connection script SylixOSBSP.ld of the BSP project, the physical memory of SylixOS is mainly divided into Five paragraphs:

The physical memory distribution of SylixOS lite version is shown in Figure 11.

< span style="font-size:9pt;">Figure 11 Memory map

1. TEXTSegment is also called code segment, which mainly stores executable code and has execution authority;

2. DATAThe section is also called the data section, which mainly contains the initialized global Variable;

3. BSSThe section mainly stores uninitialized global variables;< /span>

4. Stack is also called stack, which can store functions Local temporary variables (not including variables declared by static, static is placed in the data segment). When a function is called, its parameters may also be pushed onto the stack, and after the call is over, the return value of the function will also be stored on the stack. It can be said that the stack exists for the function;

5. The heap is used to store the memory segment that is dynamically allocated during the running of the process.

How to use the function stack

You can find a lot of how the function stack works on the Internet Introduction, here the author briefly introduces through the flowchart, as shown in Figure 12.

< span style="font-size:9pt;">Figure 12 Function stack operation flow chart

Cortex-M7 startup process

Cortex-M7 startup

STM32F767 is based on the Cortex-M7 core, Different from the traditional ARM architecture, Cortex-M7 reads the values ​​of the first two addresses from the on-chip Flash after power-on:

The value of the first address: is the MSP main stack pointer;

The value of the second address: the initial value of the PC, which can be set as the address of the first function to be executed.

As shown in Figure 21 and Figure 22.

< span style="font-size:9pt;">Figure 21 Reset sequence

Figure 22 MSPandPCInitialization example< /span>

SylixOS startup process analysis of Cortex-M7

Exception vector table

According to section 2.1, SylixOS links the exception vector table to the top of the code segment , The first item of the exception vector table is the main stack pointer, and the second item is the address of the archRSTIntHandle function, as shown in Figure 23.

< span style="font-size:9pt;">Figure 23 Exception vector table

SylixOS links the exception vector table to the first address of the code segment through the link script file, as shown in Figure 24.

< span style="font-size:9pt;">Figure 24 SylixOSBSP.ld< /span>

archRSTIntHandle function

The archRSTIntHandle function is equivalent to the reset of startup.S on other ARM platforms, as shown in Figure 25 Show.

< span style="font-size:9pt;">Figure 25 FunctionarchRSTIntHandle

According to Figure 25 shows that the flow of the archRSTIntHandle function is mainly divided into four steps:

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Remove the initialization data from the chipFlashCopy toDATA段;

1. initializeBSS segment data For0;

2. < span style="font-family:'宋体';">Board must be initialized;< /p>

3. Callbspinit, start to startSylixOSthe kernel.

Use of off-chip memory

According to the first section of the function stack and the second section of the SylixOS startup process of Cortex-M7, there are three steps to let SylixOS without Uboot use off-chip memory:

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Figure 31 config.h

Picture 32 config.lds

Picture 33Specify the stack bottom address< /p>

Figure 34< span style="font-family:'黑体';">Initialize off-chip memory

1. In the system initializationDATAinitialize the off-chip memory before the segment, as shown in the figure 34shown.

2. Set the first value of the exception vector table to an available memory address so that it can be executedarchRSTIntHandlefunction. Before initializing the off-chip memory, there is 512K The on-chip memory is available, the start address of the on-chip memory is fixed, the size is fixed, and it is directly usable. At this time, you can point the main stack pointer to the on-chip memory as shown in the figure 33 as shown.

3. BRAMThe address space is mapped to the external storage space, as shown in the figure 31< span style="font-family:'宋体';">、Picture 32shown.

Reference materials

None