I. Examination syllabus
1) Overview of the bus
The basic concept of the bus; the classification of the bus; the composition and performance indicators of the bus
2 ) Bus arbitration
Centralized arbitration mode; Distributed arbitration mode
3) Bus operation and timing
Synchronous timing mode; Asynchronous timing mode
4) Bus standard
Thinking 1, what are the benefits of introducing a bus structure? 2. What problems will the introduction of the bus structure cause? How to solve?
6.1 Bus Overview
With the development of computers and the continuous expansion of application fields, the types and quantities of I/O devices are increasing. In order to better solve the problem of the flexibility of the connection between the I/O device and the host, the structure of the computer has evolved from a decentralized connection to a bus connection. In order to further simplify the design, various bus standards have been proposed.
6.11 bus basic concepts
1, the definition of the bus A bus is a group of common information transmission lines that can be shared by multiple components in a time-sharing manner. Time-sharing and sharing are the two characteristics of the bus.
Time-sharing means that only one component is allowed to send information to the bus at a time; sharing means that multiple components can be connected to the bus. The information exchanged with each other can be time-shared through this group of lines. Only one component is allowed to send information to the bus at a certain time, but multiple components can receive the same information from the bus at the same time
2, the bus device (it can be divided according to whether it has a control function on the bus)
Master device: The master device of the bus refers to the device that obtains the control right of the bus
Slave device: The slave device of the bus refers to the device accessed by the master device and can only respond to the slave master Various bus commands sent by the device
3, bus characteristics
The bus characteristics refer to mechanical characteristics (size, shape), electrical characteristics (transmission direction and effective level range) , Functional characteristics (function of each transmission line) and time characteristics (relationship between signal and timing)
4, burst transmission of the bus
Continuous transmission and storage of addresses in one bus cycle The bus transmission method of multiple data words is called burst transmission (it is a unique supported working method of PCI)
6.1. 2 Classification of buses (divided by bus function)
1. The on-chip bus is the bus inside the chip, which is between the internal registers of the CPU chip and the registers and between the registers and the ALU. Common connection line
2, system bus
The system bus is the bus that connects the functional components (CPU, main memory, I/O interface) in the computer system
According to the different content of the system bus transmission information, it is divided into three categories: data bus, address bus and control bus
1) The data bus is used to transmit data information between various functional components. It is a two-way transmission bus, and its number of bits is related to the machine word length and storage word length.
2) The address bus is used to point out the main memory unit or I/O port where the source data and destination data on the data bus are located. The address is a one-way transmission bus. The number of bits of the address bus is related to the size of the main memory address space.
3) The control bus transmits control information, including control commands sent by the CPU and main memory ( Or peripherals) feedback information returned to the CPU
Pay attention to distinguish the data path and the data bus: the data transmission path formed by the connection of various functional components through the data bus is called the data path. The data path represents the path through which the data flows, and the data bus is the carrier medium
3, the communication bus
The communication bus is used for computer systems The bus used to transfer information between computer systems or between computer systems and other systems (such as remote communication equipment, test equipment). The communication bus is also called an external bus.
In addition, according to the timing control method, the bus can be divided into synchronous Bus and asynchronous bus. According to the data transmission format, the bus can be divided into parallel bus and serial bus
6.1.3 The structure of the system bus
The bus structure can usually be divided into single bus structure, double bus structure, and three bus structure (1, 2, 3)
1, single bus structure
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The single-bus structure connects the CPU, main memory, and I/O devices (via I/O interface) to a set of buses, and runs between I/O devices, and between I/O devices and main memory. Direct exchange of information, as shown in the figure,
Information can be exchanged directly between CPU and main memory, CPU and peripherals without the intervention of intermediate devices
Note that a single bus does not mean only one The signal line and the system bus can be divided into address bus, data bus, and control center according to the different transmission information.
Advantages: simple structure, low cost, easy to connect to new equipment; disadvantages: low bandwidth, load However, multiple components can only contend for the only bus, and do not support non-transfer operations.
2, dual-bus structure
The dual-bus structure has two buses, one is the main memory bus, which is used between the CPU, main memory and channels Data transfer; the other is the I/O bus, which is used for data transfer between multiple devices and channels, as shown in the figure
Advantages: remove lower speed I/O devices from single The bus is separated to realize the separation of the memory bus and the I/O bus. Disadvantages: Need to add hardware devices such as channels
3, three-bus structure
The three-bus structure uses three independent buses in each component of the computer system. Form the information path. These three buses are main memory bus, I/O bus and direct memory access bus DMA bus. As shown in the picture
The main memory bus is used to transfer address, data and control information between the CPU and memory. The I/O bus is used for communication between the CPU and various peripherals. The DMA bus is used to transfer data directly between memory and high-speed peripherals.
Advantages: Improve the performance of I/O devices to make them respond to commands faster and improve system throughput. Disadvantages: low system efficiency
6.14 bus performance indicators
1) bus transmission cycle : Refers to the time required for a bus operation (including application phase, addressing phase, transmission phase, and end phase), referred to as bus cycle. The bus transmission cycle usually consists of several bus clock cycles.
2) Bus clock cycle: the clock cycle of the machine. The computer has a unified clock to control the various components of the entire computer, and the bus is also controlled by this clock.
3) operating frequency of the bus: the frequency of various operations on the bus, which is the reciprocal of the bus cycle. In fact, it means to transmit data several times in one second. If the bus cycle=N clock cycles, then the working frequency of the bus=clock frequency/N
4) Clock frequency: the clock frequency of the machine, which is the reciprocal of the clock cycle.
5) bus width: also known as the bus bit width, it is the number of data bits that can be transmitted on the bus at the same time, usually refers to The number of data buses, such as 32, is called a 32-bit (bit) bus.
6) Bus bandwidth: Dangerous data transmission rate, that is, the number of bits of data that can be transmitted on the bus per unit time. It is measured by the number of bytes of information transmitted in a second, and the unit can be expressed in bytes/second B/s.
Bus bandwidth = bus operating frequency * (bus width/8).
Pay attention to the difference between bus bandwidth and bus width
7)Bus multiplexing: Bus multiplexing refers to a signal line that transmits different information at different times. More information can be transmitted using fewer lines, thereby saving cost and space.
8) Number of signal lines: The sum of the number of bus lines in the address bus, data bus and control bus 3 is called the number of signal lines.
Among them, the main performance indicators of the bus are bus width, bus (operating) frequency, bus bandwidth, bus bandwidth refers to the bus itself The highest transmission rate that can be achieved is an important indicator to measure bus performance.
The relationship between the three: bus bandwidth=bus width*bus frequency
For example, if the bus working frequency is 22MHz, the bus width is 16 bits, then the bus bandwidth=22*(16/8) =44MB/s